Custom Frequency synthesis

Note

This functionality requires Odatix 3.2+

Step 1: Initialize a directory

Place yourself in an empty directory, for example:

mkdir ~/odatix_example
cd ~/odatix_example

Run the init command of Odatix to create configuration files.

odatix init --examples

Step 2: Choose the designs you want to implement

Uncomment the architectures you want to implement in odatix_userconfig/custom_freq_synthesis_settings.yml. Those architectures are defined in odatix_userconfig/architectures.

Change the value of nb_jobs in odatix_userconfig/custom_freq_synthesis_settings.yml depending on the number of logical cores available on your CPU.

Tip

75% of your number of logical cores is usually a good balance for nb_jobs.

Example:

odatix_userconfig/custom_freq_synthesis_settings.yml
 1overwrite:        No  # overwrite existing results?
 2ask_continue:     Yes # prompt 'continue? (y/n)' after settings checks?
 3exit_when_done:   Yes # exit monitor when all jobs are done
 4log_size_limit:   300 # size of the log history per job in the monitor
 5nb_jobs:          12  # maximum number of parallel synthesis
 6
 7architectures:
 8   - Example_Counter_vhdl/04bits
 9   - Example_Counter_vhdl/08bits
10   - Example_Counter_vhdl/16bits
11   - Example_Counter_vhdl/24bits
12   - Example_Counter_vhdl/32bits
13   - Example_Counter_vhdl/48bits
14   - Example_Counter_vhdl/64bits

Step 3: Choose synthesis frequencies

Inside the directory odatix_userconfig/architectures, each architecture is defined in a _settings.yml yaml file. You can change the synthesis frequencies in these files. You can define a list of frequencies, a range (lower and upper bounds and a step) or a combination of both.

The frequencies must be defined for each target.

Example:

odatix_userconfig/architectures/Example_Counter_verilog/_settings.yml
33xc7a100t-csg324-1:
34   fmax_synthesis:
35      lower_bound: 250
36      upper_bound: 900
37   custom_freq_synthesis:
38      # list definition
39      list: [50, 100]
40xc7k70t-fbg676-2:
41   fmax_synthesis:
42      lower_bound: 200
43      upper_bound: 1800
44   custom_freq_synthesis:
45      # range definition
46      lower_bound: 200
47      upper_bound: 1800
48      step: 200

Step 4: Choose your target device/technology

Select the target device or technology in the yaml file corresponding to your EDA tool.

EDA Tool

Target File

AMD Vivado

odatix_userconfig/target_vivado.yml

Synopsys Design Compiler

odatix_userconfig/target_design_compiler.yml

OpenLane

odatix_userconfig/target_openlane.yml

Step 5: Run the selected designs

odatix freq --tool vivado

odatix freq --tool design_compiler

odatix freq --tool openlane

Step 6: Visualize and explore the results

odatix-explorer

Step 7: Try with your own design

Check out section Add your own design